LIR-DA9M

SSI

Info  CLOCK and DATA are not shown

CLOCK - input control signal
DATA - output signal with n bits

T - from 1 µs to 11 µs
t₁ > 0.45 µs
t₂ ≤ 0.2 µs
t₃ - from 12 to 35 µs

First CLOCK bus and DATA bus are set to logic 1. After first CLOCK decay DATA bus setting to 0 and encoder is storing position in buffer.

By the CLOCK fronts going bit-by-bit transmission of the fixed code value by DATA bus, then DATA is setting to logic 0 and stays for a time t₃. At this time, a fixed position code value can be re-read by setting CLOCK logic 0 and sending pulse. Repete may be done an unlimited number of times. After t₃ time DATA setting to logic 1 and encoder is ready for sending new frame. If during code reading state of CLOCK bus is not changing during time more than t₃, encoder is setting to initial state.

BiSS C

Info  CLOCK and DATA are not shown.

CLOCK - input control signal
DATA - output signal

T - not less 100 ns

Position calculation time t₁:

• unto 19 bit: ≤ 9.5 µс
• 20 bit: ≤ 9.9 µс
• 21 bit: ≤ 10.2 µс
• 22 bit: ≤ 10.6 µс
• 23 bit: ≤ 11 µс

Timeout t₂ ≤ 16 µс (adaptive for LIR-DA116V, LIR-DA119A.01, LIR-DA120A.02, LIR-DA290A, LIR-DA156A, LIR-DA165A and LIR-DA216 series)

Acknowledgment Ack - always set to 0
Bit Start - always set to 1
Bit CDS - always set to 0
D - position code with n bits
Bit Error - means error if set to 0
Bit Warning - means warning if set to 0
Six bits checksum CRC, polinom 0х43, initial value 0